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FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
14 years 1 months ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...
3DIC
2009
IEEE
169views Hardware» more  3DIC 2009»
15 years 2 months ago
3-D memory organization and performance analysis for multi-processor network-on-chip architecture
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...
Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerase...
FPL
2007
Springer
106views Hardware» more  FPL 2007»
15 years 3 months ago
Monte Carlo Logarithmic Number System for Model Predictive Control
Simple algorithms can be analytically characterized, but such analysis is questionable or even impossible for more complicated algorithms, such as Model Predictive Control (MPC). ...
Panagiotis D. Vouzis, Sylvain Collange, Mark G. Ar...
WICSA
2004
14 years 11 months ago
Compositional Generation of Software Architecture Performance QN Models
Early performance analysis based on Queueing Network Models (QNM) has been often proposed to support software designers during the software development process. These approaches a...
Antinisca Di Marco, Paola Inverardi
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
15 years 10 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar