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DATE
2004
IEEE
146views Hardware» more  DATE 2004»
15 years 1 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
IPPS
2006
IEEE
15 years 3 months ago
A multiprocessor architecture for the massively parallel model GCA
The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical...
Wolfgang Heenes, Rolf Hoffmann, Johannes Jendrsczo...
HCW
1999
IEEE
15 years 2 months ago
An On-Line Performance Visualization Technology
We present a new software technology for on-line performance analysis and visualization of complex parallel and distributed systems. Often heterogeneous, these systems need capabi...
Aleksandar M. Bakic, Matt W. Mutka, Diane T. Rover
JCP
2008
119views more  JCP 2008»
14 years 9 months ago
Performance Comparisons, Design, and Implementation of RC5 Symmetric Encryption Core using Reconfigurable Hardware
With the wireless communications coming to homes and offices, the need to have secure data transmission is of utmost importance. Today, it is important that information is sent con...
Omar S. Elkeelany, Adegoke Olabisi
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
15 years 1 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...