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ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
15 years 6 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
DAC
2004
ACM
15 years 10 months ago
Circuit-aware architectural simulation
Architectural simulation has achieved a prominent role in the system design cycle by providing designers the ability to quickly examine a wide variety of design choices. However, ...
Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Tod...
ERSA
2008
93views Hardware» more  ERSA 2008»
14 years 11 months ago
Multiparadigm Computing for Space-Based Synthetic Aperture Radar
Projected computational requirements for future space missions are outpacing technologies and trends in conventional embedded microprocessors. In order to meet the necessary levels...
Adam Jacobs, Grzegorz Cieslewski, Casey Reardon, A...
HPCA
2008
IEEE
15 years 10 months ago
Uncovering hidden loop level parallelism in sequential applications
As multicore systems become the dominant mainstream computing technology, one of the most difficult challenges the industry faces is the software. Applications with large amounts ...
Hongtao Zhong, Mojtaba Mehrara, Steven A. Lieberma...
CODES
1996
IEEE
15 years 1 months ago
A Model for the Coanalysis of Hardware and Software Architectures
Successful """tiprocessor system design for complex realtime embedded applications requires powerful and comprehensive. yet cost-effective. productive. and maintain...
Fred Rose, Todd Carpenter, Sanjaya Kumar, John Sha...