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DATE
1999
IEEE
85views Hardware» more  DATE 1999»
15 years 1 months ago
At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks
As an at-speed solution to board-level interconnect testing, an enhanced boundary-scan architecture utilizing a combination of slightly modified boundary-scan cells and a user-def...
Jongchul Shin, Hyunjin Kim, Sungho Kang
AIPS
2008
14 years 11 months ago
Planning for Modular Printers: Beyond Productivity
This paper reports our experience extending an on-line printer controller based on AI planning to handle two significant features of this commercially important domain: execution ...
Minh Binh Do, Wheeler Ruml, Rong Zhou
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 1 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
INFOCOM
2010
IEEE
14 years 8 months ago
Cooperative Resource Management in Cognitive WiMAX with Femto Cells
Abstract—WiMAX with femto cells is a cost-effective nextgeneration broadband wireless communication system. Cognitive Radio (CR) has recently emerged as a promising technology to...
Jin Jin, Baochun Li
WSC
2000
14 years 10 months ago
Virtual machines for message based, real-time and interactive simulation
An advanced processing machine interacts with the material handling system, personnel and cell or shop floor controller in real-time via messaging and control. However, current si...
Hansoo Kim, Chen Zhou, Hua X. Du