30 search results - page 5 / 6 » FPGA device and architecture evaluation considering process ... |
FPL
2007
Springer
15 years 3 months ago
2007
Springer
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
In this paper we explore the use of a set of novel design metrics for characterizing the impact of gate oxide tunneling current in nanometer CMOS devices and perform Monte Carlo s...
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
As technology scales ever further, device unreliability is creating excessive complexity for hardware to maintain the illusion of perfect operation. In this paper, we consider whe...
DAC
1994
ACM
15 years 1 months ago
1994
ACM
Acyclic partitioning on combinational boolean networks has wide range of applications, from multiple FPGA chip partitioning to parallel circuit simulation. In this paper, we prese...
CN
2006
2006
A generic characterization of the overheads imposed by IPsec and associated cryptographic algorithms
14 years 9 months ago
This paper presents an assessment of the communication overheads of IPsec and evaluates the feasibility of deploying it on handheld devices for the UMTS architecture. A wide range...