134 search results - page 16 / 27 » FPGA implementation of log-polar mapping |
CODES
2009
IEEE
15 years 1 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
124
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FCCM
2011
IEEE
14 years 1 months ago
2011
IEEE
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
CODES
2007
IEEE
15 years 3 months ago
2007
IEEE
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
MAM
2006
14 years 9 months ago
2006
FPGA placement and routing is time consuming, often serving as the major obstacle inhibiting a fast edit-compile-test loop in prototyping and development and the major obstacle pr...
121
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DSD
2011
IEEE
13 years 9 months ago
2011
IEEE
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...