134 search results - page 24 / 27 » FPGA implementation of log-polar mapping |
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
IWANN
2005
Springer
15 years 3 months ago
2005
Springer
In this paper, a fully functional prototype of an asynchronous 4-to-4 Address Event Representation (AER) mapper is presented. AER is an event driven communication protocol original...
ARC
2009
Springer
15 years 4 months ago
2009
Springer
A system for automatically classifying the trajectory of a moving object in a scene as usual or suspicious is presented. The system uses an unsupervised neural network (Self Organi...
ICCD
2002
IEEE
15 years 6 months ago
2002
IEEE
In this paper, a parallel Variable-Length Decoding (VLD) scheme is introduced. The scheme is capable of decoding all the codewords in an N-bit buffer whose accumulated codelength ...
FCCM
2007
IEEE
15 years 3 months ago
2007
IEEE
FPGA-based computing engines have become a promising option for the implementation of computationally intensive applications due to high flexibility and parallelism. However, one...