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IPPS
1998
IEEE
13 years 10 months ago
Virtual FPGAs: Some Steps Behind the Physical Barriers
Recent advances in FPGA technologies allow to configure the RAM-based FPGA devices in a reduced time as an effective support for real-time applications. The physical dimensions of ...
William Fornaciari, Vincenzo Piuri
IPPS
2000
IEEE
13 years 10 months ago
Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping
We consider technology mapping from factored form binary leaf-DAG to lookup tables LUTs, such as those found in eld programmable gate arrays. Polynomial time algorithms exist f...
Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
FPL
2009
Springer
166views Hardware» more  FPL 2009»
13 years 11 months ago
Modeling post-techmapping and post-clustering FPGA circuit depth
This paper presents an analytical model that relates FPGA architectural parameters to the expected speed of FPGA implementation. More precisely, the model relates the lookuptable ...
Joydip Das, Steven J. E. Wilton, Philip Heng Wai L...
FPGA
2000
ACM
479views FPGA» more  FPGA 2000»
13 years 10 months ago
Implementing a RAKE receiver for wireless communications on an FPGA-based computer system
RAKE receivers are widely used in the wireless communications industry. Currently, custom VLSI is the most popular implementation. Programmable and reconfigurable logic implementa...
Ali M. Shankiti, Miriam Leeser
EH
2004
IEEE
131views Hardware» more  EH 2004»
13 years 10 months ago
Swarm Intelligence for Digital Circuits Implementation on Field Programmable Gate Arrays Platforms
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize ...
Ganesh K. Venayagamoorthy, Venu G. Gudise