363 search results - page 44 / 73 » FPGA interconnect design using logical effort |
182
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ISPD
2012
ACM
14 years 1 months ago
2012
ACM
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
174
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ISLPED
2005
ACM
15 years 11 months ago
2005
ACM
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
178
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ROBIO
2006
IEEE
15 years 11 months ago
2006
IEEE
- The implementation of inverse kinematics and servo controller for robot manipulator using FPGA (Field Programmer Gate Array) is investigated in this paper. Firstly, the mathemati...
130
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IEEEPACT
2007
IEEE
16 years 1 days ago
2007
IEEE
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
132
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SERP
2007
15 years 7 months ago
2007
– The use of design patterns such as the GRASP (General Responsibility Assignment Software Principles) or GoF (Gang-of-Four) patterns in software engineering has been well-docume...