197 search results - page 31 / 40 » FPGA-based SIMD Processor |
102
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DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
110
Voted
IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
Algorithmic skeletons can be used to write architecture independent programs, shielding application developers from the details of a parallel implementation. In this paper, we pre...
105
Voted
LCTRTS
2001
Springer
15 years 4 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
98
Voted
IPPS
2000
IEEE
15 years 4 months ago
2000
IEEE
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
100
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IPPS
1997
IEEE
15 years 3 months ago
1997
IEEE
Given an n-degree polynomial f x over an arbitrary ring, the shift of f x by c is the operation which computes coefficients of the polynomial f x + c . In this paper we conside...