Fault-tolerant architectures based on physical replication of components are vulnerable to faults that cause the same effect in all replica. Short outages in a power supply shared...
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...