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CHES
2005
Springer
123views Cryptology» more  CHES 2005»
15 years 9 months ago
Improved Higher-Order Side-Channel Attacks with FPGA Experiments
We demonstrate that masking a block cipher implementation does not sufficiently improve its security against side-channel attacks. Under exactly the same hypotheses as in a Differ...
Eric Peeters, François-Xavier Standaert, Ni...
FPL
2005
Springer
127views Hardware» more  FPL 2005»
15 years 9 months ago
Fast FPGA Placement using Space-filling Curve
In this paper, we propose a placement method for islandstyle FPGAs, based on recursive bi-partitioning followed by application of space-filling curves. Experimental results of ou...
Pritha Banerjee, Subhasis Bhattacharjee, Susmita S...
FPL
2005
Springer
110views Hardware» more  FPL 2005»
15 years 9 months ago
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...
Robert G. Dimond, Oskar Mencer, Wayne Luk
FPL
2005
Springer
115views Hardware» more  FPL 2005»
15 years 9 months ago
Statistical Power Estimation for FPGA
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...
Elias Todorovich, Fabian Angarita, Javier Valls, E...
ISNN
2005
Springer
15 years 9 months ago
FPGA Realization of a Radial Basis Function Based Nonlinear Channel Equalizer
In this paper we propose a radial basis function (RBF) neural network for nonlinear time-invariant channel equalizer. The RBF network model has a three-layer structure which is com...
Poyueh Chen, Hungming Tsai, ChengJian Lin, ChiYung...