1862 search results - page 113 / 373 » FPGA |
139
click to vote
BIBE
2007
IEEE
15 years 5 months ago
2007
IEEE
In this paper we describe our design and characterization of a co-processor architecture to accelerate median-based phylogenetic reconstruction for generearrangement data. Our curr...
125
click to vote
FPL
2008
Springer
15 years 5 months ago
2008
Springer
Today, quasi-Monte Carlo (QMC) methods are widely used in finance to price derivative securities. The QMC approach is popular because for many types of derivatives it yields an es...
106
click to vote
FPL
2008
Springer
15 years 5 months ago
2008
Springer
The effectiveness of implementing bit-stream signal processing (BSSP) multiplier circuits in FPGAs, in terms of hardware resources and clock frequency, is presented. In particular...
126
click to vote
FPL
2008
Springer
15 years 5 months ago
2008
Springer
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...
138
Voted
SERSCISA
2010
Springer
15 years 5 months ago
2010
Springer
The delay and dispersion of the packet train have been widely used in most network measurement tools. The timestamp of the packet is critical for the measurement accuracy. However...