Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
The problem of Network Traffic Classification (NTC) has attracted significant amount of interest in the research community, offering a wide range of solutions at various levels. Th...
This paper proposes a robust real-time, scalable and modular Field Programmable Gate Array (FPGA) based implementation of a spatiotemporal segmentation of video objects. The goal ...
This paper argues the case for the use of analytical models in FPGA architecture layout exploration. We show that the problem when simplified, is amenable to formal optimization t...
Asma Kahoul, George A. Constantinides, Alastair M....
We propose a new powerful scalable generic parallel and modular architecture well suited to LDPC code decoding. This architecture template has been instantiated in the case of the...