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IOLTS
2003
IEEE
124views Hardware» more  IOLTS 2003»
15 years 9 months ago
Designing FPGA based Self-Testing Checkers for m-out-of-n Codes
The paper describes a specific method for designing selfchecking checkers for m-out-of-n codes. The method is oriented to the Field Programmable Gate Arrays technology and is base...
A. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. N...
106
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FPL
2003
Springer
109views Hardware» more  FPL 2003»
15 years 9 months ago
Globally Asynchronous Locally Synchronous FPGA Architectures
Abstract. Globally Asynchronous Locally Synchronous (GALS) Systems have provoked renewed interest over recent years as they have the potential to combine the benefits of asynchron...
Andrew Royal, Peter Y. K. Cheung
DATE
2002
IEEE
115views Hardware» more  DATE 2002»
15 years 9 months ago
Design Technology for Networked Reconfigurable FPGA Platforms
Future networked appliances should be able to download new services or upgrades from the network and execute them locally. This flexibility is typically achieved by processors tha...
Steve Guccione, Diederik Verkest, Ivo Bolsens
DATE
2002
IEEE
90views Hardware» more  DATE 2002»
15 years 9 months ago
FPGA Placement by Thermodynamic Combinatorial Optimization
Juan de Vicente, Juan Lanchares, Román Herm...