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IPPS
2000
IEEE
15 years 8 months ago
Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping
We consider technology mapping from factored form binary leaf-DAG to lookup tables LUTs, such as those found in eld programmable gate arrays. Polynomial time algorithms exist f...
Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
ASPDAC
2000
ACM
79views Hardware» more  ASPDAC 2000»
15 years 8 months ago
VLSI implementation of rake receiver for IS-95 CDMA Testbed using FPGA
Oliver Yuk-Hang Leung, Chi-Ying Tsui, Roger S. Che...
105
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AES
2000
Springer
94views Cryptology» more  AES 2000»
15 years 8 months ago
A Comparison of the AES Candidates Amenability to FPGA Implementation
Nicholas Weaver, John Wawrzynek
ISLPED
1999
ACM
72views Hardware» more  ISLPED 1999»
15 years 8 months ago
The design of a low energy FPGA
George Varghese, Hui Zhang, Jan M. Rabaey
FCCM
1999
IEEE
126views VLSI» more  FCCM 1999»
15 years 8 months ago
A CAD Suite for High-Performance FPGA Design
Brad L. Hutchings, Peter Bellows, Joseph Hawkins, ...