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CCECE
2006
IEEE
15 years 10 months ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
FCCM
2006
IEEE
137views VLSI» more  FCCM 2006»
15 years 10 months ago
Single Pass, BLAST-Like, Approximate String Matching on FPGAs
Abstract: Approximate string matching is fundamental to bioinformatics, and has been the subject of numerous FPGA acceleration studies. We address issues with respect to FPGA imple...
Martin C. Herbordt, Josh Model, Yongfeng Gu, Bhara...
IPPS
2006
IEEE
15 years 10 months ago
2D defragmentation heuristics for hardware multitasking on reconfigurable devices
This paper focuses on the fragmentation problem produced in 2D run-time reconfigurable FPGAs when hardware multitasking management is considered. Though allocation heuristics can ...
Julio Septién, Hortensia Mecha, Daniel Mozo...
IPPS
2006
IEEE
15 years 10 months ago
ReConfigME: a detailed implementation of an operating system for reconfigurable computing
Reconfigurable computing applications have traditionally had the exclusive use of the field programmable gate array, primarily because the logic densities of the available devices...
Grant B. Wigley, David A. Kearney, Mark Jasiunas
FPGA
2005
ACM
156views FPGA» more  FPGA 2005»
15 years 9 months ago
Design of programmable interconnect for sublithographic programmable logic arrays
Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
André DeHon