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FPGA
2008
ACM
623views FPGA» more  FPGA 2008»
15 years 6 months ago
From the bitstream to the netlist
We present an in-depth analysis of the Xilinx bitstream format. The information gathered in this paper allows bitstream compilation and decompilation. While not actually compromis...
Jean-Baptiste Note, Éric Rannaud
AIA
2006
15 years 5 months ago
FPGA-Targeted Neural Architecture for Embedded Alertness Detection
Several recent works have used neural networks to discriminate vigilance states in humans from electroencephalographic (EEG) signals. Our study aims at being more exhaustive. It t...
Bernard Girau, Khaled Ben Khalifa
ERSA
2004
129views Hardware» more  ERSA 2004»
15 years 5 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
ERSA
2006
100views Hardware» more  ERSA 2006»
15 years 5 months ago
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems
Current FPGAs are heterogeneous partially reconfigurable architectures, consisting of several resource types, e. g., logic cells and embedded memory. By using partial reconfigurat...
Markus Koester, Heiko Kalte, Mario Porrmann
ERSA
2006
119views Hardware» more  ERSA 2006»
15 years 5 months ago
Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment
Run-time assignment of a set of communicating tasks onto a heterogeneous multiprocessor system-on-chip (MPSoC) platform is a challenging task. Having FPGA fabric tiles in such MPS...
Vincent Nollet, Prabhat Avasare, Diederik Verkest,...