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FPL
2005
Springer
79views Hardware» more  FPL 2005»
15 years 10 months ago
FPGA-based implementation and comparison of recursive and iterative algorithms
The paper analyses and compares alternative iterative and recursive implementations of FPGA circuits for various problems. Two types of recursive calls have been examined, namely ...
Valery Sklyarov, Iouliia Skliarova, Bruno Figueire...
FPL
2003
Springer
120views Hardware» more  FPL 2003»
15 years 9 months ago
Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms
The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
Konstantinos Tatas, K. Siozios, Dimitrios Soudris,...
ICES
1998
Springer
131views Hardware» more  ICES 1998»
15 years 8 months ago
Aspects of Digital Evolution: Geometry and Learning
In this paper we present a new chromosome representation for evolving digital circuits. The representation is based very closely on the chip architecture of the Xilinx 6216 FPGA. W...
Julian F. Miller, Peter Thomson
VLSID
1994
IEEE
113views VLSI» more  VLSID 1994»
15 years 8 months ago
A Methodology for Architecture Synthesis of Cascaded IIR Filters on TLU FPGAs
In this paper, we propose an architecture synthesis methodolog `to realize cascaded Infinite Impulse Response (IIRJfilter in Table Look Up (TLU) Field Progmmmable Gate A m y s (FP...
G. N. Rathna, S. K. Nandy, K. Parthasarathy
DAC
1993
ACM
15 years 8 months ago
A Negative Reinforcement Method for PGA Routing
We present an efficient and effective method for the detailed routing of symmetrical or sea-of-gates FPGA architectures. Instead of breaking the problem into 2-terminal net collec...
Forbes D. Lewis, Wang Chia-Chi Pong