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FPL
2008
Springer
98views Hardware» more  FPL 2008»
15 years 6 months ago
Comparing throughput and power consumption in both sequential and reconfigurable processors
Recent improvements in the memory capacity of Field Programmable Gate Arrays (FPGAs) have spurred interest in using the devices for arithmetic floating-point operations. However, ...
Kevin K. Liu, Charles B. Cameron, Antal A. Sarkady
TVLSI
2008
149views more  TVLSI 2008»
15 years 4 months ago
Architectural Modifications to Enhance the Floating-Point Performance of FPGAs
With the density of FPGAs steadily increasing, FPGAs have reached the point where they are capable of implementing complex floating-point applications. However, their general-purpo...
Michael J. Beauchamp, Scott Hauck, Keith D. Underw...
IPPS
2010
IEEE
15 years 2 months ago
Improving application performance with hardware data structures
Contemporary processors are becoming wider and more parallel. Thus developers must work hard to extract performance gains. An alternative computing paradigm is to use FPGA technolo...
Ravikesh Chandra, Oliver Sinnen
IPPS
2010
IEEE
15 years 2 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
IMCSIT
2010
14 years 11 months ago
Real-time controller design based on NI Compact-RIO
Abstract--The paper is focused on NI Compact-RIO configured as a controller for the active magnetic levitation used here as a benchmark for time-critical systems. Three realtime co...
Maciej Rosól, Adam Pilat, Andrzej Turnau