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Lecture Notes
1005views
17 years 4 months ago
Lectures on reconfigurable computing
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...
Sherief Reda
DAC
2005
ACM
16 years 5 months ago
MiniBit: bit-width optimization via affine arithmetic
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayn...
ICCD
2006
IEEE
132views Hardware» more  ICCD 2006»
16 years 1 months ago
FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems
— High secure cryptographic systems require large bit-length encryption keys which presents a challenge to their efficient hardware implementation especially in embedded devices...
Osama Al-Khaleel, Christos A. Papachristou, Franci...
ARITH
2009
IEEE
15 years 11 months ago
A 32-bit Decimal Floating-Point Logarithmic Converter
This paper presents a new design and implementation of a 32-bit decimal floating-point (DFP) logarithmic converter based on the digit-recurrence algorithm. The converter can calc...
Dongdong Chen, Yu Zhang, Younhee Choi, Moon Ho Lee...
145
Voted
DDECS
2009
IEEE
171views Hardware» more  DDECS 2009»
15 years 11 months ago
Packet header analysis and field extraction for multigigabit networks
—Packet header analysis and extraction of header fields needs to be performed in all network devices. As network speed is increasing quickly, high speed packet header processing...
Petr Kobierský, Jan Korenek, Libor Polcak