This paper examines some models of FSMs that can be implemented in dynamically and statically reconfigurable FPGAs. They enable circuits for the FSMs to be constructed in such a wa...
Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing has become a subject of a great deal of research. By mapping the compute-intens...
Katherine Compton, Zhiyuan Li, James Cooley, Steph...
Fixed-complexity sphere decoder (FSD) is a recently proposed technique for multiple-input multiple-output (MIMO) detection. It has several outstanding features such as constant thr...
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
Lucia Bissi, Pisana Placidi, Giuseppe Baruffa, And...
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...