1862 search results - page 232 / 373 » FPGA |
163
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TVLSI
2010
15 years 4 days ago
2010
In many applications, a reduction of the amount of the original data or a representation of the original data by a small set of variables is often required. Among many techniques, ...
167
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Publication
_2011.jpg "NeuFlow: A Runtime Reconfigurable Dataflow Processor for Vision")
In this paper we present a scalable dataflow hard- ware architecture optimized for the computation of general- purpose vision algorithms—neuFlow—and a dataflow compiler—luaFl...
145
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ICASSP
2011
IEEE
14 years 9 months ago
2011
IEEE
X-ray computed tomography (CT) images could be improved using iterative image reconstruction if the 3D conebeam forward- and back-projection computations can be accelerated signif...
155
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ASYNC
2010
IEEE
14 years 9 months ago
2010
IEEE
— Synchronizers play a key role in multi-clock domain systems on chip. Traditionally, improvement of synchronization parameters with scaling has been assumed. In particular, the ...
147
Voted
ICIP
2002
IEEE
16 years 7 months ago
2002
IEEE
The JPEG-LS algorithm is one of the recently designated standards for lossless compression of grayscale and color images. In this paper, simulation results for lossless and near l...