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ASAP
2007
IEEE
122views Hardware» more  ASAP 2007»
15 years 11 months ago
Parallelizing HMMER for Hardware Acceleration on FPGAs
Profile based Hidden Markov Model is a widely used tool in bioinformatics. While being very valuable to biologists, it is extremely compute intensive and suffers from prohibitive...
Steven Derrien, Patrice Quinton
FCCM
2007
IEEE
101views VLSI» more  FCCM 2007»
15 years 11 months ago
Mapping Real Time Operating System on Reconfigurable Instruction Cell Based Architectures
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
Han Wei, Mark Muir, Ioannis Nousias, Tughrul Arsla...
FCCM
2007
IEEE
120views VLSI» more  FCCM 2007»
15 years 11 months ago
Automatic Self-Reconfiguration of System-on-Chip Peripherals
A technique is presented which allows an FPGAbased reconfigurable System-on-Chip to automatically and dynamically load hardware peripheral controllers and software device drivers ...
Neil W. Bergmann, Yi Lu 0004, John A. Williams
ISCAS
2007
IEEE
176views Hardware» more  ISCAS 2007»
15 years 11 months ago
SPA against an FPGA-Based RSA Implementation with a High-Radix Montgomery Multiplier
— Simple Power Analysis (SPA) was applied to an RSA processor with a high-radix Montgomery multiplier on an FPGA platform, and the different characteristics of power waveforms ca...
Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Ak...
ISVLSI
2007
IEEE
100views VLSI» more  ISVLSI 2007»
15 years 11 months ago
Vector Processing Support for FPGA-Oriented High Performance Applications
In this paper, we propose and implement a vector processing system that includes two identical vector microprocessors embedded in two FPGA chips. Each vector microprocessor suppor...
Hongyan Yang, Shuai Wang, Sotirios G. Ziavras, Jie...