1862 search results - page 235 / 373 » FPGA |
127
click to vote
FPL
2007
Springer
15 years 11 months ago
2007
Springer
The reconfigurable mesh is a model for massively parallel computing for which many algorithms with very low complexity have been developed. These algorithms execute cycles of bus...
129
click to vote
FPL
2007
Springer
15 years 11 months ago
2007
Springer
This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the saltand-pepper noise of high intensity (up to 70% of corrupted pix...
118
Voted
IPPS
2006
IEEE
15 years 11 months ago
2006
IEEE
This paper presents the design and study of reconfigurable architectures for two data-link layer frame delineation techniques used for ATM and GFP. The architectures are targeted ...
124
click to vote
ISCAS
2006
IEEE
15 years 11 months ago
2006
IEEE
—In the design of a packet-oriented impulse-radio UWB communication system, the main challenge at the receiver is to have a fast synchronization to the coded pulses, along with a...
113
click to vote
ISCAS
2006
IEEE
15 years 11 months ago
2006
IEEE
— This paper compares implementations of elliptic and hyperelliptic curve cryptography (ECC and HECC) on an FPGA platform. We use the same low-level blocks to implement the basic...