1862 search results - page 238 / 373 » FPGA |
151
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FPL
2004
Springer
15 years 10 months ago
2004
Springer
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
128
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FPL
2004
Springer
15 years 10 months ago
2004
Springer
This paper presents an innovative way to deploy Bitstream Intellectual Property (BIP) cores. By using standard tools to generate bitstreams for Field Programmable Gate Arrays (FPGA...
113
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FPL
2004
Springer
15 years 10 months ago
2004
Springer
The paper describes two methods for the design of matrix-oriented SAT solvers based on data compression. The first one provides matrix compression in a host computer and decompress...
143
Voted
ISVLSI
2003
IEEE
15 years 10 months ago
2003
IEEE
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...
156
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ICES
2003
Springer
15 years 10 months ago
2003
Springer
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...