Abstract. This paper presents a new data representation known as Dual FiXedpoint (DFX), which employs a single bit exponent to select two different fixedpoint scalings. DFX provide...
Chun Te Ewe, Peter Y. K. Cheung, George A. Constan...
We take a fresh look at the problem of how to check safety properties of finite state machines. We are particularly interested in checking safety properties with the help of a SAT-...
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...
Abstract. An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16-bit address space into an 8-bit one. The target technolog...
Ernesto Damiani, Valentino Liberali, Andrea Tettam...
This paper presents a performance-oriented placement and routing tool for field-programmable gate arrays. Using recursive geometric partitioning for simultaneous placement and glo...
Michael J. Alexander, James P. Cohoon, Joseph L. G...