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FPL
1995
Springer
129views Hardware» more  FPL 1995»
15 years 9 months ago
An Assessment of the Suitability of FPGA-Based Systems for Use in Digital Signal Processing
Abstract. FPGAs have been proposed as high-performance alternatives to DSP processors. This paper quantitatively compares FPGA performance against DSP processors and ASICs using ac...
Russell J. Petersen, Brad L. Hutchings
DDECS
2007
IEEE
133views Hardware» more  DDECS 2007»
15 years 7 months ago
Prototyping Generators for On-line Test Vector Generation Based on PSL Properties
— From an assumed property, which constrains the inputs of a design under test, we produce a RTL synthesizable design that generates compliant sequences of values for all the sig...
Yann Oddos, Katell Morin-Allory, Dominique Borrion...
FPL
2008
Springer
117views Hardware» more  FPL 2008»
15 years 7 months ago
A versatile hardware architecture for a CFAR detector based on a linear insertion sorter
This paper presents a versatile hardware architecture that implements six variant of the CFAR detector based on linear and non-linear operations. Since some implemented CFAR detec...
Roberto Perez-Andrade, René Cumplido, Claud...
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DAGSTUHL
2007
15 years 6 months ago
Parallelism through Digital Circuit Design
Abstract. Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed eï¬...
John O'Donnell
ERSA
2006
91views Hardware» more  ERSA 2006»
15 years 6 months ago
Intrinsic Embedded Hardware Evolution of Block-based Neural Networks
- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
Saumil Merchant, Gregory D. Peterson, Seong Kong