1862 search results - page 254 / 373 » FPGA |
182
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AHS
2007
IEEE
15 years 11 months ago
2007
IEEE
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
125
Voted
DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
115
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DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
Weaknesses have recently been found in the widely used cryptographic hash functions SHA-1 and MD5. A potential alternative for these algorithms is the Whirlpool hash function, whi...
111
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DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
105
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DSD
2007
IEEE
15 years 11 months ago
2007
IEEE
We present the architecture of digit-serial normal basis multiplier over GF(2m ). The multiplier was derived from the multiplier of Agnew et al. Proposed multiplier is scalable by...