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AHS
2006
IEEE
137views Hardware» more  AHS 2006»
15 years 10 months ago
Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
Wing On Fung, Tughrul Arslan, Sami Khawam
APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
15 years 10 months ago
Fully-multiplexed First-order 3D IIR Frequency-Planar Filter Module
— A VLSI hardware architecture for the on-chip implementation of a first-order 3D IIR fully-multiplexed frequencyplanar filter module (FMFPM) is proposed. FMFPMs may be employed ...
Arjuna Madanayake, Leonard T. Bruton
APCCAS
2006
IEEE
245views Hardware» more  APCCAS 2006»
15 years 10 months ago
Digital Audio Broadcasting System Modeling and Hardware Implementation
— DAB is a growing communication technology for digital audio broadcasting and demands higher concentration on flexible and cost optimum implementations for use in new mobile ele...
Nariman Moezzi Madani, Hamed Holisaz, Seid Mehdi F...
ASAP
2006
IEEE
147views Hardware» more  ASAP 2006»
15 years 10 months ago
The Molen FemtoJava Engine
This paper presents the Molen FemtoJava engine that is extended with concepts taken from the Molen polymorphic processor. This allows for the existing FemtoJava to be augmented wi...
Júlio C. B. de Mattos, Stephan Wong, Luigi ...
AVSS
2006
IEEE
15 years 10 months ago
Real-Time Video Segmentation with VGA Resolution and Memory Bandwidth Reduction
This paper presents the implementation of a video segmentation unit used for embedded automated video surveillance systems. Various aspects of the underlying segmentation algorith...
Hongtu Jiang, Viktor Öwall, Håkan Ard&o...