1862 search results - page 259 / 373 » FPGA |
117
click to vote
CCECE
2006
IEEE
15 years 10 months ago
2006
IEEE
— The aim of this research is to implement sensorless vector control algorithms on a single, eventually reconfigurable, chip, with a computation timing constraint of, at most, 1...
125
click to vote
DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...
126
click to vote
DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
Network-on-Chip (NoC)-based communication represents a promising solution to complex on-chip communication problems. Due to their regular structure, mesh-like NoC architectures ha...
149
click to vote
DELTA
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents a hardware architecture for layer 2 Multi Protocol Label Switching (MPLS). MPLS is a protocol framework used primarily to prioritize internet traffic and impro...
125
click to vote
GLOBECOM
2006
IEEE
15 years 10 months ago
2006
IEEE
— A cooperative MIMO network is considered with Ns sensors and a collector node with Mc antennas. In a practical implementation of this network, the sensor carriers have relative...