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81
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DAC
2006
ACM
15 years 10 months ago
A new hybrid FPGA with nanoscale clusters and CMOS routing
In this paper we propose a hybrid FPGA using nanoscale clusters with an architecture similar to clusters of traditional CMOS FPGAs. The proposed cluster is made of a crossbar of n...
Reza M. Rad, Mohammad Tehranipoor
77
Voted
ICCAD
2003
IEEE
194views Hardware» more  ICCAD 2003»
15 years 6 months ago
On the Interaction Between Power-Aware FPGA CAD Algorithms
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
Julien Lamoureux, Steven J. E. Wilton
FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
15 years 1 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
FPL
2006
Springer
158views Hardware» more  FPL 2006»
15 years 1 months ago
Actual-Delay Circuits on FPGA: Trading-Off Luts for Speed
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
Evangelia Kassapaki, Pavlos M. Mattheakis, Christo...
ICASSP
2011
IEEE
14 years 1 months ago
FPGA implementation made easy for applied digital signal processing courses
Applied digital signal processing courses offered at many universities do not normally include FPGA implementation of signal processing algorithms. This is due to the fact that st...
Nasser D. Kehtarnavaz, Sidharth Mahotra