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FPL
2009
Springer
101views Hardware» more  FPL 2009»
15 years 9 months ago
An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
Tobias Schumacher, Christian Plessl, Marco Platzne...
159
Voted
FPL
2001
Springer
107views Hardware» more  FPL 2001»
15 years 9 months ago
Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays
In this paper we present a new method of integrating the placement and routing stages in the physical design of channel-based architectures, and present the first implementation o...
John Karro, James P. Cohoon
ICES
2001
Springer
78views Hardware» more  ICES 2001»
15 years 8 months ago
Embryonics: Artificial Cells Driven by Artificial DNA
Abstract. Embryonics is a long-term research project attempting to draw inspiration from the biological process of ontogeny, to implement novel digital computing machines endowed w...
Lucian Prodan, Gianluca Tempesti, Daniel Mange, An...
ICES
2001
Springer
136views Hardware» more  ICES 2001»
15 years 8 months ago
Initial Studies of a New VLSI Field Programmable Transistor Array
A system for intrinsic hardware evolution of analog electronic circuits is presented. It consists of a VLSI chip featuring 16 × 16 programmable transistor cells, an FPGA based PCI...
Jörg Langeheine, Joachim Becker, Simon Fö...
150
Voted
IJCNN
2000
IEEE
15 years 8 months ago
Hardware Implementation of a PCA Learning Network by an Asynchronous PDM Digital Circuit
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
Yuzo Hirai, Kuninori Nishizawa