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FPL
2008
Springer
126views Hardware» more  FPL 2008»
15 years 5 months ago
Customized Reconfigurable Interconnection Networks for multiple application SOCS
A Customized Reconfigurable Interconnection Network (CRIN) refers to a minimal switching network, yielding routing solutions for any element in a pre-given set of routing requirem...
Hongbing Fan, Jason Ernst, Yu-Liang Wu
FPL
2008
Springer
120views Hardware» more  FPL 2008»
15 years 5 months ago
An FPGA-based implementation of the MINRES algorithm
Due to continuous improvements in the resources available on FPGAs, it is becoming increasingly possible to accelerate floating point algorithms. The solution of a system of linea...
David Boland, George A. Constantinides
FPL
2008
Springer
125views Hardware» more  FPL 2008»
15 years 5 months ago
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...
Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dud...
ASAP
2010
IEEE
193views Hardware» more  ASAP 2010»
15 years 5 months ago
Automatic generation of polynomial-based hardware architectures for function evaluation
Abstract--Polynomial approximation is a very general technique for the evaluation of a wide class of numerical functions of one variable. This article details an architecture gener...
Florent de Dinechin, Mioara Joldes, Bogdan Pasca
FPL
2008
Springer
138views Hardware» more  FPL 2008»
15 years 5 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...