1862 search results - page 300 / 373 » FPGA |
122
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DAC
2005
ACM
16 years 5 months ago
2005
ACM
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
117
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
This paper describes an ultra low power active RFID tag and its automated design flow. RFID primitives to be supported by the tag are enumerated with RFID macros and the behavior ...
144
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
140
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DCC
2007
IEEE
16 years 3 months ago
2007
IEEE
In this contribution, we derive a novel parallel formulation of the standard Itoh-Tsujii algorithm for multiplicative inverse computation over GF(2m). The main building blocks use...
125
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ASAP
2009
IEEE
16 years 1 months ago
2009
IEEE
—This paper describes the acceleration of virtual ecology models using field-programmable gate arrays (FPGAs). Our approach targets models generated by the Virtual Ecology Workb...