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FPT
2005
IEEE
142views Hardware» more  FPT 2005»
15 years 3 months ago
Custom Hardware Architectures for Posture Analysis
This paper describes the design and implementation of hardware architectures for posture analysis. Posture analysis is an active research area in computer vision. It can be used i...
M. P. T. Juvonen, José Gabriel F. Coutinho,...
HOTI
2005
IEEE
15 years 3 months ago
SIFT: Snort Intrusion Filter for TCP
Intrusion rule processing in reconfigurable hardware enables intrusion detection and prevention services to run at multi Gigabit/second rates. High-level intrusion rules mapped d...
Michael Attig, John W. Lockwood
IPPS
2005
IEEE
15 years 3 months ago
Dynamic Reconfiguration of Mechatronic Real-Time Systems Based on Configuration State Machines
Data flow and FSMs are used intensively to specify real-time systems in the field of mechatronics. Their implementation in FPGAs is discussed against the background of dynamic rec...
Steffen Toscher, Roland Kasper, Thomas Reinemann
IPPS
2005
IEEE
15 years 3 months ago
Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...
Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna
ISCAS
2005
IEEE
146views Hardware» more  ISCAS 2005»
15 years 3 months ago
A novel approach for network on chip emulation
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
Nicolas Genko, David Atienza, Giovanni De Micheli,...