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DAGSTUHL
2006
14 years 11 months ago
Physical 2D Morphware and Power Reduction Methods for Everyone
Dynamic and partial reconfiguration discovers more and more the focus in academic and industrial research. Modern systems in e.g. avionic and automotive applications exploit the p...
Jürgen Becker, Michael Hübner, Katarina ...
ERSA
2004
86views Hardware» more  ERSA 2004»
14 years 11 months ago
Incremental Timing Budget Management in Programmable Systems
Delay budget is an excess delay that each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quali...
Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahas...
ERSA
2006
186views Hardware» more  ERSA 2006»
14 years 11 months ago
The Case for High Level Programming Models for Reconfigurable Computers
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
David L. Andrews, Ron Sass, Erik Anderson, Jason A...
ERSA
2006
115views Hardware» more  ERSA 2006»
14 years 11 months ago
Reconfigurable Acceleration of Robust Frequency-Domain Echo Cancellation
Acoustic echo control is of vital interest for hands-free operation of telecommunications equipment. An important property of an acoustic echo controller is its capability to hand...
Chun Hok Ho, Ka Fai Cedric Yiu, Jiaquan Huo, Sven ...
ERSA
2006
147views Hardware» more  ERSA 2006»
14 years 11 months ago
Code Partitioning for Reconfigurable High-Performance Computing: A Case Study
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
Volodymyr V. Kindratenko