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CODES
2010
IEEE
14 years 7 months ago
Automatic memory partitioning: increasing memory parallelism via data structure partitioning
In high-level synthesis, pipelined designs are often restricted by the number of memory banks available to the synthesis system. Using multiple memory banks can improve the perfor...
Yosi Ben-Asher, Nadav Rotem
ISJGP
2010
14 years 6 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos
IJNSEC
2010
247views more  IJNSEC 2010»
14 years 4 months ago
Hardware Implementation of Efficient Modified Karatsuba Multiplier Used in Elliptic Curves
The efficiency of the core Galois field arithmetic improves the performance of elliptic curve based public key cryptosystem implementation. This paper describes the design and imp...
Sameh M. Shohdy, Ashraf El-Sisi, Nabil A. Ismail
SIGARCH
2010
89views more  SIGARCH 2010»
14 years 4 months ago
Efficient reconfigurable design for pricing asian options
Arithmetic Asian options are financial derivatives which have the feature of path-dependency: they depend on the entire price path of the underlying asset, rather than just the in...
Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, ...
TVLSI
2010
14 years 4 months ago
Enhancing the Area Efficiency of FPGAs With Hard Circuits Using Shadow Clusters
There is a dramatic logic density gap between FPGAs and ASICs, and this gap is the main reason FPGAs are not cost-effective in high volume applications. Modern FPGAs narrow this ga...
Peter A. Jamieson, Jonathan Rose