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ICCD
2007
IEEE
245views Hardware» more  ICCD 2007»
15 years 6 months ago
FPGA global routing architecture optimization using a multicommodity flow approach
Low energy and small switch area usage are two of the important design objectives in FPGA global routing architecture design. This paper presents an improved MCF model based CAD ï...
Yuanfang Hu, Yi Zhu, Michael Bedford Taylor, Chung...
ICCAD
2003
IEEE
138views Hardware» more  ICCAD 2003»
15 years 6 months ago
Multi-Million Gate FPGA Physical Design Challenges
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
Maogang Wang, Abhishek Ranjan, Salil Raje
RECONFIG
2008
IEEE
198views VLSI» more  RECONFIG 2008»
15 years 4 months ago
High Performance Implementation of a Public Key Block Cipher - MQQ, for FPGA Platforms
– We have implemented in FPGA recently published class of public key algorithms – MQQ, that are based on quasigroup string transformations. Our implementation achieves decrypti...
Mohamed El-Hadedy, Danilo Gligoroski, Svein J. Kna...
FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
15 years 2 months ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
15 years 2 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...