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FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 3 months ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
15 years 3 months ago
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
Sergio López-Buedo, Eduardo I. Boemo
FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
15 years 3 months ago
Reducing pin and area overhead in fault-tolerant FPGA-based designs
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz...
FPGA
2010
ACM
294views FPGA» more  FPGA 2010»
15 years 2 months ago
Axel: a heterogeneous cluster with FPGAs and GPUs
This paper describes a heterogeneous computer cluster called Axel. Axel contains a collection of nodes; each node can include multiple types of accelerators such as FPGAs (Field P...
Kuen Hung Tsoi, Wayne Luk
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
15 years 2 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor