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CCS
2007
ACM
15 years 4 months ago
Compact FPGA implementations of QUAD
QUAD is a stream cipher whose provable security relies on the hardness of solving systems of multivariate quadratic equations. This paper explores FPGA implementations of the stre...
David Arditti, Côme Berbain, Olivier Billet,...
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
15 years 4 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
FPL
2007
Springer
127views Hardware» more  FPL 2007»
15 years 4 months ago
Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications
This paper presents a novel architecture for domain-specific FPGA devices. This architecture can be optimised for both speed and density by exploiting domain-specific informatio...
Chun Hok Ho, Chi Wai Yu, Philip Heng Wai Leong, Wa...
DATE
2006
IEEE
80views Hardware» more  DATE 2006»
15 years 3 months ago
Energy-efficient FPGA interconnect design
Despite recent advances in FPGA devices and embedded cores, their deployment in commercial products remains rather limited due to practical constraints on, for example, cost, size...
Maurice Meijer, Rohini Krishnan, Martijn T. Benneb...
FPGA
2001
ACM
145views FPGA» more  FPGA 2001»
15 years 2 months ago
Simultaneous logic decomposition with technology mapping in FPGA designs
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
Gang Chen, Jason Cong