1862 search results - page 85 / 373 » FPGA |
143
Voted
ICCAD
2004
IEEE
16 years 15 days ago
2004
IEEE
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
122
Voted
DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
- Clock skew scheduling (CSS) is an effective technique to optimize clock period of sequential designs. However, these techniques are not effective in the presence of certain desig...
105
Voted
AHS
2007
IEEE
15 years 10 months ago
2007
IEEE
We describe the FPGA HPC Alliance’s Parallel Toolkit (PTK), an initial step towards the standardization of high-level configuration and APIs for high-performance reconfigurable ...
120
Voted
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
94
Voted
DSD
2006
IEEE
15 years 9 months ago
2006
IEEE
The ModEasy project seeks to develop techniques and software tools to aid in the development of reliable microprocessor based electronic (embedded) systems using advanced developm...