1862 search results - page 86 / 373 » FPGA |
126
Voted
ISCAS
2005
IEEE
15 years 9 months ago
2005
IEEE
— Significant headway has been made in logic density and performance of FPGAs in the past decade. Power efficiency of FPGA architectures is arguably the next most important crite...
119
Voted
FPL
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. We present an evaluation of accelerating fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is fre...
97
Voted
FPL
2004
Springer
15 years 9 months ago
2004
Springer
This paper proposes a new adaptable FPGA logic element based on fracturable 6-LUTs, which fundamentally alters the longstanding belief that a 4-LUT is the most efficient area/delay...
131
Voted
FPL
1997
Springer
15 years 7 months ago
1997
Springer
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
126
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FPL
2006
Springer
15 years 7 months ago
2006
Springer
In this paper we introduce a new method to identify IP cores in an FPGA by analyzing the content of lookup tables. This techniques can be used to identify registered cores for IP ...