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117
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DAC
2009
ACM
16 years 1 months ago
Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
Jürgen Teich, Martin Lukasiewycz, Michael Gla...
126
Voted
ECRTS
2006
IEEE
15 years 6 months ago
Sensitivity Analysis for Fixed-Priority Real-Time Systems
At early stages in the design of real-time embedded applications, the timing attributes of the computational activities are often incompletely specified or subject to changes. Lat...
Enrico Bini, Marco Di Natale, Giorgio C. Buttazzo
MICRO
1993
IEEE
131views Hardware» more  MICRO 1993»
15 years 4 months ago
Superblock formation using static program analysis
Compile-time code transformations which expose instruction-level parallelism (ILP) typically take into account the constraints imposed by all execution scenarios in the program. H...
Richard E. Hank, Scott A. Mahlke, Roger A. Bringma...
79
Voted
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
15 years 6 months ago
System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint
— Multiview video coding (MVC) systems require much more bandwidth and computational complexity relative to mono-view video systems. Thus, when designing a VLSI architecture for ...
Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi ...
123
Voted
CIKM
2009
Springer
15 years 7 months ago
Packing the most onto your cloud
Parallel dataflow programming frameworks such as Map-Reduce are increasingly being used for large scale data analysis on computing clouds. It is therefore becoming important to a...
Ashraf Aboulnaga, Ziyu Wang, Zi Ye Zhang