380 search results - page 64 / 76 » Fast, Effective Dynamic Compilation |
128
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EUROPAR
2005
Springer
15 years 7 months ago
2005
Springer
Dynamic instruction scheduling logic is one of the most critical and cycle-limiting structures in modern superscalar processors, and it is not easily pipelined without significant ...
111
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DATE
2003
IEEE
15 years 7 months ago
2003
IEEE
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
129
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ISCA
2003
IEEE
15 years 7 months ago
2003
IEEE
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processo...
IPPS
1996
IEEE
15 years 5 months ago
1996
IEEE
Brewer and Kuszmaul [BK94] demonstrated how barriers and traffic interleaving can alleviate the problem of bulk-transfer performance degradation on the Thinking Machines CM-5, by ...
295
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AINA
2010
IEEE
15 years 5 months ago
2010
IEEE
—Mnesic evocation occurs under the action of a stimulus. A successful evocation is observed as the overrun of a certain threshold of the neuronal activity followed by a medical i...