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DAC
2006
ACM
15 years 3 months ago
A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming
We propose a novel and efficient charge-based decoupling capacitance budgeting algorithm. Our method uses the macromodeling technique and effective radius of decoupling capacitan...
Min Zhao, Rajendran Panda, Savithri Sundareswaran,...
CORR
2011
Springer
177views Education» more  CORR 2011»
14 years 4 months ago
Tuffy: Scaling up Statistical Inference in Markov Logic Networks using an RDBMS
Markov Logic Networks (MLNs) have emerged as a powerful framework that combines statistical and logical reasoning; they have been applied to many data intensive problems including...
Feng Niu, Christopher Ré, AnHai Doan, Jude ...
DAC
2002
ACM
15 years 10 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
INFOCOM
2003
IEEE
15 years 2 months ago
Load optimal MPLS routing with N+M labels
Abstract— MPLS is becoming an important protocol for intradomain routing. MPLS routers are offered by the major vendors and many ISPs are deploying MPLS in their IP backbones, as...
David Applegate, Mikkel Thorup
ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
15 years 6 months ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong