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ICS
1999
Tsinghua U.
15 years 2 months ago
Reorganizing global schedules for register allocation
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
Gang Chen, Michael D. Smith
IPPS
1998
IEEE
15 years 2 months ago
Optimistic Synchronization of Mixed-Mode Simulators
Mixed-Mode simulation has been generating considerable interest in the simulation community and has continued to grow as an active research area. Traditional mixed-mode simulation...
Peter Frey, Radharamanan Radhakrishnan
IPPS
1998
IEEE
15 years 2 months ago
An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams
Instruction scheduling methods based on the construction of state diagrams (or automata) have been used for architectures involving deeply pipelined function units. However, the s...
Ramaswamy Govindarajan, N. S. S. Narasimha Rao, Er...
JSSPP
1997
Springer
15 years 1 months ago
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...
Tim Brecht
IRREGULAR
1995
Springer
15 years 1 months ago
Run-Time Parallelization of Irregular DOACROSS Loops
Dependencies between iterations of loop structures cannot always be determined at compile-time because they may depend on input data which is known only at run-time. A prime examp...
V. Prasad Krothapalli, Thulasiraman Jeyaraman, Mar...