Despite the progress of the last decades in electronic design automation, arithmetic circuits have always received way less attention than other classes of digital circuits. Logic...
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...
This paper introduces a transparent self-configuring architecture for automatic scaling with temperature awareness in the database tier of a dynamic content web server. We use a ...
Saeed Ghanbari, Gokul Soundararajan, Jin Chen, Cri...
This paper proposes a pilot-aided joint channel estimation and synchronization scheme for burst-mode orthogonal frequency division multiplexing (OFDM) systems. The scheme eliminate...
We consider a single-cell multiple-input multiple-output (MIMO) downlink channel where linear transmission and reception strategy is employed. The base station (BS) transmitter is...