Sciweavers

406 search results - page 57 / 82
» Fast Increment Registers
Sort
View
MICRO
2003
IEEE
132views Hardware» more  MICRO 2003»
15 years 5 months ago
Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors
Large instruction window processors achieve high performance by exposing large amounts of instruction level parallelism. However, accessing large hardware structures typically req...
Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasa...
LCPC
2009
Springer
15 years 4 months ago
Using the Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops
This paper improves our previous research effort [1] by providing an efficient method for kernel loop unrolling minimisation in the case of already scheduled loops, where circular...
Mounira Bachir, David Gregg, Sid Ahmed Ali Touati
FC
1997
Springer
86views Cryptology» more  FC 1997»
15 years 4 months ago
The SPEED Cipher
Abstract. SPEED is a private key block cipher. It supports three variable parameters: (1) data length — the length of a plaintext/ciphertext of SPEED can be 64, 128 or 256 bits. ...
Yuliang Zheng
CARS
2004
15 years 1 months ago
Robotically assisted ablative treatment guided by freehand 3D ultrasound
Robots can improve the accuracy of image-guided needle placement over traditional free-hand techniques. While many research groups have demonstrated this, widespread clinical adopt...
Emad Boctor, Robert J. Webster III, Michael A. Cho...
ICIP
2005
IEEE
16 years 1 months ago
An articulated registration method
This paper introduces a new registration method estimating the displacement field of bodies which deformations are constrained by an articulated rigid body. We propose an articula...
Aloys du Bois d'Aische, Mathieu De Craene, Beno&ic...