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DELTA
2002
IEEE
15 years 2 months ago
Teaching Integrated Circuit and Semiconductor Device Design in New Zealand: The University of Canterbury Approach
Teaching the practical aspects of device and chip design in New Zealand presents many problems, including high manufacturing costs, long lead times, and the lack of local industry...
Richard J. Blaikie, Maan M. Alkaisi, Steven M. Dur...
ISCAS
2006
IEEE
86views Hardware» more  ISCAS 2006»
15 years 3 months ago
Fast timing analysis of plane circuits via two-layer CNN-based modeling
Abstract— A fast timing analysis of plane circuits via two-layer CNNbased modeling, which is necessary for the solution of power/signal integrity problems in printed circuit boar...
Yuichi Tanji, Hideki Asai, Masayoshi Oda, Yoshifum...
ASPDAC
2007
ACM
107views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Advanced tools for simulation and design of oscillators/PLLs
We present a robust, automated oscillator macromodeling technique for extracting comprehensive phase and amplitude macromodels from oscillators' SPICE circuit descriptions. Th...
Xiaolue Lai, Jaijeet S. Roychowdhury
FPL
2000
Springer
130views Hardware» more  FPL 2000»
15 years 1 months ago
Area-Optimized Technology Mapping for Hybrid FPGAs
As integration levels in FPGA devices have increased over the past decade, the structure of programmable logic resources has become more diversified. Recently, Altera Corporation h...
Srini Krishnamoorthy, Sriram Swaminathan, Russell ...
ISQED
2000
IEEE
136views Hardware» more  ISQED 2000»
15 years 2 months ago
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...
Mohamed Dessouky, Marie-Minerve Louërat